脳領域間の相互作用を解読する神経チップを開発(Neural chip decodes interactions between brain regions)

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2026-10-23 スイス連邦工科大学ローザンヌ校(EPFL)

スイス連邦工科大学ローザンヌ校(EPFL)の研究チームは、脳の複数領域間の神経活動の連携を解析し、認知状態や感情状態をリアルタイムで識別する低消費電力の埋め込み型神経チップ「LogSync」を開発した。従来の脳深部刺激療法(DBS)は、あらかじめ設定した条件で刺激する方式や、単一の脳領域の信号に依存する方式が多く、精神疾患に関係する脳領域間の相互作用を捉えることが課題だった。本チップは脳波の振動や領域間の同期性を示す指標を抽出し、機械学習によって認知・感情状態を分類するとともに、特定の状態を検出した際に神経刺激のタイミングを制御する。ヒトの脳活動データを用いた評価では認知的関与や感情的覚醒の識別に成功し、ラットを用いた実験では脳活動の位相に応じた刺激トリガーの生成を確認した。消費電力は200マイクロワット未満で、精神疾患に対する個別化治療や、パーキンソン病などの神経疾患に向けた次世代神経刺激技術への応用が期待される。

脳領域間の相互作用を解読する神経チップを開発(Neural chip decodes interactions between brain regions)
LogSync chips, measuring approximately 4×2 mm. 2026 EPFL / Lundi13 – CC-BY-SA 4.0

<関連情報>

LogSync:地域間同期抽出と適応型精神状態分類のための低消費電力対数SoC LogSync: A Low-Power Logarithmic SoC for Cross-Regional Synchrony Extraction and Adaptive Psychiatric State Classification

Daney Alex; Amitabh Yadav; Jieun Joo; Uisub Shin; Jinhan Liu; Geoffrey W. Diehl,…
IEEE Journal of Solid-State Circuits  Published:09 September 2026
DOI:https://doi.org/10.1109/JSSC.2026.3728617

Abstract

Closed-loop deep brain stimulation (DBS) has emerged as a promising therapeutic approach for treatment-resistant psychiatric disorders, offering the potential to modulate pathological network activity in real time. To support such interventions, we present a 32-channel brain–computer interface (BCI) system-on-chip (SoC) that integrates two key functions: 1) adaptive, biomarker-driven classification of psychiatric states and 2) phase-locked closed-loop DBS. The SoC incorporates a 32-channel low-noise analog front-end (AFE), a logarithmic arithmetic unit (LAU) for efficient and accurate feature extraction (FE), including spectral power, phase, and connectivity biomarkers, a neural additive model (NAM) classifier with backpropagation-free online adaptation, and a programmable multi-mode stimulation controller that enables flexible coordination with an external stimulator. Fabricated in 65-nm CMOS, the chip occupies 5.46 mm2 and consumes 6.14 μ W/channel while achieving an energy efficiency of 0.197 μ J/classification. The proposed SoC was extensively validated on two intracranial electroencephalography (iEEG) datasets related to psychiatric disorders, achieving 80.9%/74.8% sensitivity and 74.2%/73.1% specificity on the multi-source interference task (MSIT) and the emotional conflict resolution (ECR) task, respectively. We further evaluated the SoC on the public DEAP dataset for electroencephalography (EEG)-based emotion recognition, achieving 70.5%/72.5% sensitivity and 69.8%/66.3% specificity for the arousal and valence states, respectively. In addition, we performed in vitro measurements and in vivo characterization in a Long-Evans rat to validate the AFE and phase-locked stimulation controller, confirming the feasibility of the proposed SoC for real-time intervention. Overall, the architecture enables accurate, low-power, and interpretable classification of complex neural states, supporting adaptive DBS for psychiatric neuromodulation and other BCI applications.


RECTOR:情動的および認知的表現学習のためのマスクされた領域チャネル時間モデリング RECTOR: Masked Region-Channel-Temporal Modeling for Affective and Cognitive Representation Learning

Jinhan Liu, Mahsa Shoaran
Proceedings of the 43rd International Conference on Machine Learning 2026

Abstract

Affective and cognitive disorders manifest as distributed, time-varying brain network dynamics across regions, channels, and time, challenging robust representation learning from EEG/sEEG for clinical diagnosis. We propose RECTOR (Masked Region–Channel–Temporal Modeling), an end-to-end self-supervised framework that unifies joint region-channel-temporal representation learning beyond fixed anatomical priors. At its core, RECTOR-SA is a hierarchical, block-sparse self-attention induced by Adaptive Functional Partitioning that evolves region structures from static anatomical definitions to adaptive functional regions. The self-supervision is driven by Masked Topology and Representation Learning, which jointly optimizes three complementary objectives: Masked Predictive Modeling, Topological Structure Modeling, and Cross-View Consistency. Across diverse benchmarks, RECTOR sets a new state-of-the-art in EEG emotion recognition and sEEG task-engagement classification. Crucially, its strong robustness to missing channels and cross-montage generalization underscores its potential for large-scale pre-training on heterogeneous EEG/sEEG, providing interpretable insights at both region and channel levels.


32チャンネル196-μW​脳ネットワーク接続性抽出と適応型精神症状分類のための対数的SoC A 32-Channel 196-μW Logarithmic SoC for Brain Network Connectivity Extraction and Adaptive Psychiatric Symptom Classification

Daney Alex; Amitabh Yadav; Jieun Joo; Uisub Shin; Arshia Afzal; Jinhan Liu,…
2025 Symposium on VLSI Technology and Circuits  Date Added to IEEE Xplore: 18 July 2025
DOI:https://doi.org/10.23919/VLSITechnologyandCir65189.2025.11075022

Abstract

This paper presents a 32-channel brain-computer interface SoC for closed-loop deep-brain stimulation in psychiatric disorders. The SoC integrates a 32-channel analog front-end, an efficient logarithmic feature extraction engine, a neural additive model classifier with online update, and a multimode stimulation controller. Fabricated in 65 nm CMOS, the 5.46 mm2 SoC consumes 6.14μ W/ channel, enabling accurate, low-power, and adaptive detection of psychiatric

生物工学一般
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